342 lines
11 KiB
C++
342 lines
11 KiB
C++
//si, bueno, testx
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//dossPxa
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/*
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* THREADIN THE LINUS: https://linux.die.net/man/2/sched_setaffinity
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*/
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/*
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*THREADIN THE WINDOS: https://learn.microsoft.com/en-us/windows/win32/procthread/process-and-thread-functions
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*/
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//clangbug: https://bugs.llvm.org/show_bug.cgi?id=24232
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//tsc synced across cpu intel: https://community.intel.com/t5/Software-Tuning-Performance/TSCs-per-logical-processor-Per-socket/m-p/1121318
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//lfence: https://hadibrais.wordpress.com/2018/05/14/the-significance-of-the-x86-lfence-instruction/
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/*
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In the Intel(R) 64 and IA-32 Architectures Software Developer's Manual Volume 3B Sec 17.13.1 it says:
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"On processors with invariant TSC support, the OS may use the TSC for wall clock timer services."
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Does this formally imply that the TSC is always synchronized across all cores?
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By default the TSC is synchronized across all cores. However, the TSC value of a core could be changed by some software subsystem using the WRMSR instruction. Take a look at quotes below and I hope they finally answer your estion:
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Intel(R) 64 and IA-32 Architectures Software Developer's Manual Volume 3 (3A, 3B & 3C): System Programming Guide Order Number: 325384-044US August 2012 Page 571 17.13 TIME-STAMP COUNTER ... Constant TSC behavior ensures that the duration of each clock tick is uniform and supports the use of the TSC as a wall clock timer even if the processor core changes frequency. ... Page 572 17.13.3 Time-Stamp Counter Adjustment ... Software can modify the value of the time-stamp counter (TSC) of a logical processor by using the WRMSR instruction to write to the IA32_TIME_STAMP_COUNTER MSR (address 10H). Because such a write applies only to that logical processor, software seeking to synchronize the TSC values of multiple logical processors must perform these writes on each logical processor. It may be difficult for software to do this in a way than ensures that all logical processors will have the same value for the TSC at a given point in time. The synchronization of TSC adjustment can be simplified by using the 64-bit IA32_TSC_ADJUST MSR ( address 3BH ). Like the IA32_TIME_STAMP_COUNTER MSR, the IA32_TSC_ADJUST MSR is maintained separately for each logical processor. ...
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*/
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//TSC is incremented by the base multiplier once every reference clock, so on my Xeon E5-2680 (Sandy Bridge EP) this is an increment of 27 every 10 ns
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#ifdef _WIN64
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//#include <Windows.h>
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//#includqe <sysinfoapi.h>
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//#include <powerbase.h>
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#define UNICODE
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#define WIN32_LEAN_AND_MEAN
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#define _WIN32_WINNT _WIN32_WINNT_WIN10 //0x0A00
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#define MAX_KEY_LENGTH 255
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#define MAX_VALUE_NAME 32767
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#include <Windows.h>
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#include <winreg.h>
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#include <stringapiset.h>
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#include <synchapi.h>
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#endif
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#ifdef NOMESELDELINUS
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//hilitos y tal
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#endif
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#include <vector>
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#include <iostream>
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#include "../debug.h"
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bool checkInvariantTSC(){ //Generic
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uint64_t rdx;
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asm volatile (".intel_syntax noprefix\t\n" \
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"mov eax, 0x80000007\t\n" \
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// 080000007h\t\n"
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"cpuid\t\n" : "=d" (rdx) );
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bool iTSC = rdx & (1<<8);
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//"and edx, 10000000\n")
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return iTSC;
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}
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bool checkRDTSCP(){ //Generic
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uint64_t rdx;
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asm volatile (".intel_syntax noprefix\t\n" \
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"mov eax, 0x80000001\t\n" \
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// 080000007h\t\n"
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"cpuid\t\n" : "=d" (rdx) );
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bool RDTSCP = rdx & (1<<27);
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//"and edx, 10000000\n")
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return RDTSCP;
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}
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/*
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1er comentario: https://community.intel.com/t5/Software-Tuning-Performance/TSC-frequency-computation/m-p/1193432
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https://community.intel.com/t5/Software-Tuning-Performance/i5-8250U-1-6-GHz-has-a-base-frequency-of-1-8-GHz/m-p/1155718/highlight/true
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15H
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NOTES: If EBX[31:0] is 0, the TSC/"core crystal clock" ratio is not enumerated.
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EBX[31:0]/EAX[31:0] indicates the ratio of the TSC frequency and the core crystal clock frequency.
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If ECX is 0, the nominal core crystal clock frequency is not enumerated.
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"TSC frequency" = "core crystal clock frequency" * EBX/EAX.
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The core crystal clock may differ from the reference clock, bus clock, or core clock frequencies.
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EAX Bits 31-00: An unsigned integer which is the denominator of the TSC/"core crystal clock" ratio.
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EBX Bits 31-00: An unsigned integer which is the numerator of the TSC/"core crystal clock" ratio.
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ECX Bits 31-00: An unsigned integer which is the nominal frequency of the core crystal clock in Hz.
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EDX Bits 31-00: Reserved = 0.
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*/
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char* AMDMeCagoEnTusPutosMuertos () {
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/*
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* Extended name on AMD systems when using 8000_002-4. 8000_0000 for Extpagequant/vendor. Hijos de puta.
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* Now parsing 0H for standard brand name
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*/
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char* palabritas = (char*)malloc(sizeof(char) * 13);
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uint8_t siguienteLetra = 0;
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//uint64_t regs[4]; //rax rbx, rcx, rdx; Was used for Extended name/vendor
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uint64_t regs[3];//rbx, rcx, rdx;
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asm volatile ( ".intel_syntax noprefix\t\n" \
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"mov eax, 0x0\t\n" \
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"cpuid\t\n" : "=b" (regs[0]), "=c" (regs[2]), "=d" (regs[1]) );
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int byte = 0;
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for (int reg = 0; reg < 3; reg++, byte = 0){
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char* charifiedReg = (char*)®s[reg];
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for(; byte < 4; byte++, siguienteLetra++ ){
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palabritas[siguienteLetra] = charifiedReg[byte];
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}
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}
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palabritas[siguienteLetra] = '\0';
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return palabritas;
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}
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//GMET on??????????? jfc wtf
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bool AMDJoderMET(){
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uint64_t rdx;
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asm volatile ( ".intel_syntax noprefix\t\n" \
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"mov eax, 0x8000000A\t\n" \
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"cpuid\t\n" : "=d" (rdx));
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return (((1<<17) & rdx));
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}
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int16_t checkFrequencyTSC(uint64_t* freq){
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//la idea era hacerla todo aqui; este primero mira el num de pags
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if (freq == nullptr) return -1;
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uint64_t raxde;
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asm volatile ( ".intel_syntax noprefix\t\n" \
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"mov eax, 0x0\t\n" \
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"cpuid\t\n" : "=a" (raxde) );
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log_debugcpp("raxo " << raxde);
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if (raxde < 15) {
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//check tsc existence??????
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uint64_t rdxmsr;
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asm volatile ( ".intel_syntax noprefix\t\n" \
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"mov eax, 0x01\t\n" \
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"cpuid\t\n" : "=a" (raxde), "=d" (rdxmsr) );
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if (!((1<<5) & rdxmsr)) return -3;
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asm volatile ( ".intel_syntax noprefix\t\n" \
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"mov eax, 0x01\t\n" \
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"cpuid\t\n" : "=a" (raxde), "=d" (rdxmsr) );
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}
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uint64_t rbxnum, rcxhz;
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asm volatile ( ".intel_syntax noprefix\t\n" \
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"mov eax, 0x15\t\n" \
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"cpuid\t\n" : "=a" (raxde), "=b" (rbxnum), "=c" (rcxhz) );
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//"rdtscp\n" : "=a" (raxlo), "=d" (rdxho));
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log_debugcpp("hmm " << raxde << " " << rbxnum << " " << rcxhz);
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if (rbxnum == 0 || rcxhz == 0) return -2;
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//also 18.17.4 Invariant Time-Keepin Volume 3 Intel
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uint64_t TSCFreq = (rcxhz * rbxnum)/raxde;
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*freq = TSCFreq;
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log_debugcpp("raxo " << TSCFreq << " " << *freq);
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return 0;
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}
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//static inline
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uint64_t rdtsc() {
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uint64_t raxlo,rdxho;
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asm volatile ( ".intel_syntax noprefix\t\n"
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"lfence\n" \
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"rdtsc\n" \
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//"rdtscp\n" : "=a" (raxlo), "=d" (rdxho), "=c" (aux) : : );
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"lfence\n" : "=a" (raxlo), "=d" (rdxho));
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return (rdxho << 32) + raxlo; //|
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}
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//static inline
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uint64_t rdtscp(uint64_t* logicore = nullptr ) {
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uint64_t raxlo,rdxho, rcx;
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asm volatile ( ".intel_syntax noprefix\t\n"
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"rdtscp\t\n"
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"lfence\t\n": "=a" (raxlo), "=d" (rdxho), "=c" (rcx) );
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//"rdtscp\n" : "=a" (raxlo), "=d" (rdxho));
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if (logicore != nullptr) *logicore = rcx;
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return (rdxho << 32) + raxlo; //|
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}
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//labor encomiable, ahora muere
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uint64_t estimandoFreq(){
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uint64_t test = rdtsc();
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Sleep(1000);
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test = rdtsc() - test;
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return test;
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}
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#ifdef _WIN64
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//https://learn.microsoft.com/en-us/windows/win32/api/sysinfoapi/nf-sysinfoapi-getnativesysteminfo
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//https://learn.microsoft.com/en-us/windows/win32/api/powerbase/nf-powerbase-callntpowerinformation?redirectedfrom=MSDN
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/*
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* And this is why I'm reading the reg instead
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*/
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int64_t getFreqFromReg(){
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//https://learn.microsoft.com/en-us/windows/win32/api/winreg/nf-winreg-regenumvaluew
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const WORD STRING_SIZE = 4;
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const WCHAR COMPARE_TARGET[STRING_SIZE + 1] = L"~MHz";
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DWORD longestDataSize;
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LSTATUS status;
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HKEY key;
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DWORD numValues;
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WCHAR valName[MAX_VALUE_NAME]; //uint32_t wtf
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DWORD valLen = MAX_VALUE_NAME;
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LPBYTE dataContent = nullptr;
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DWORD dataLen;
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// DOESN'T WORK MS WHY const WORD NULL_ENDING_STRING = -1;
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status = RegOpenKeyExW(HKEY_LOCAL_MACHINE, TEXT("HARDWARE\\DESCRIPTION\\System\\CentralProcessor\\0"), 0,
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KEY_QUERY_VALUE, &key);
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if(status != ERROR_SUCCESS) return -1;
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status = RegQueryInfoKey(
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key, // key handle
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NULL, // buffer for class name
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NULL, // size of class string
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NULL, // reserved
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NULL, // number of subkeys
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NULL, // longest subkey size
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NULL, // longest class string
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&numValues, // number of values for this key
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NULL, // longest value name
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&longestDataSize, // longest value data
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NULL, // security descriptor
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NULL); // last write time
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if(status != ERROR_SUCCESS) {
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RegCloseKey(key);
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return -2;
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}
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dataLen = sizeof(REG_QWORD) * (longestDataSize);
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dataContent = (LPBYTE)malloc(dataLen);
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for (DWORD i = 0; i < numValues; i++){
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valLen = MAX_VALUE_NAME;
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//data NULL + len NON_NULL to get dataBufLen;
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//data allocated (NON-NULL) + len NON-NULL with previous value for dataLen
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//JFC MS WHY. that why we defaultin to biggis. cos not worky. ewe
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dataLen = sizeof(REG_QWORD) * (longestDataSize);
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status = RegEnumValueW(key,
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i,
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valName,
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&valLen,
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NULL,
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NULL,
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dataContent,
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&dataLen
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);
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if(status != ERROR_SUCCESS) {
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RegCloseKey(key);
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return -3;
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}
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if (CSTR_EQUAL == CompareStringEx(
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LOCALE_NAME_INVARIANT,
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NORM_LINGUISTIC_CASING,
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valName,
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valLen,
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COMPARE_TARGET,
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STRING_SIZE,
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NULL,
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NULL,
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0
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)
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) {
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//dataLen = dataLen * 2lu;
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/* BROS YO ES QUE ME VOY A CAGAR EN SUS PUTOS MUERTOS
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* ASí QUE PIDES DOS VECES, UNA TAMAńO, OTRA A TOPE PRESISO, EH
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* PUTA BASURA DE API
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* status = RegEnumValueW(key,
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* i,
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* valName,
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* &valLen,
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* NULL,
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* NULL,
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* dataContent,
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* &dataLen
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* );
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*/
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LPDWORD PMHz = (LPDWORD)dataContent;
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DWORD MHz = *PMHz;
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free(dataContent);
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status = RegCloseKey(key);
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return MHz * 1000000;
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//break;
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}
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}
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if(status != ERROR_SUCCESS) {
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status = RegCloseKey(key);
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return -4;
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}
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}
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#endif
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int main(int argc, char** argv){
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//AMD Momento
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char* opiniones = AMDMeCagoEnTusPutosMuertos();
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bool w11 = AMDJoderMET();
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for (int i = 0; i < 3; i++) {
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uint64_t isItActually32GHz = estimandoFreq();
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log_debugcpp("ayo we found " << isItActually32GHz << " flash knuckle");
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}
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int64_t juas = getFreqFromReg();
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log_debugcpp("JODER " << juas);
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//iwintewel
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//Cordura
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int16_t result;
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uint64_t tf = 0;
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//uint64_t* TSCFreq = &tf;
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bool iTSC = checkInvariantTSC();
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bool RDTSC = checkRDTSCP();
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result = checkFrequencyTSC(&tf);
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log_debugcpp("INTEL YO HOW WE DOIN " << tf << result);
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if (iTSC && !result) {
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uint64_t test = rdtsc();
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log_debugcpp(test);
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uint64_t ayo = 0;
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uint64_t* logicore = &ayo;//nullptr;
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uint64_t testp = rdtscp(logicore);
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log_debugcpp(testp << " + " << &logicore);
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return 0;
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}
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return -1;
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}
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