amd momento de hacerte pensar
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92
src/main.cpp
92
src/main.cpp
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@ -28,7 +28,7 @@ Intel(R) 64 and IA-32 Architectures Software Developer's Manual Volume 3 (3A, 3B
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#include <iostream>
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#include <iostream>
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#include "debug.h"
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#include "debug.h"
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bool checkInvariantTSC(){
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bool checkInvariantTSC(){ //Generic
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uint64_t rdx;
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uint64_t rdx;
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asm volatile (".intel_syntax noprefix\t\n" \
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asm volatile (".intel_syntax noprefix\t\n" \
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"mov eax, 0x80000007\t\n" \
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"mov eax, 0x80000007\t\n" \
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@ -40,9 +40,18 @@ bool checkInvariantTSC(){
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}
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}
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/*
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/*
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15H NOTES: If EBX[31:0] is 0, the TSC/"core crystal clock" ratio is not enumerated.
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EBX[31:0]/EAX[31:0] indicates the ratio of the TSC frequency and the core crystal clock frequency. If ECX is 0, the nominal core crystal clock frequency is not enumerated. "TSC frequency" = "core crystal clock frequency" * EBX/EAX. The core crystal clock may differ from the reference clock, bus clock, or core clock frequencies.
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1er comentario: https://community.intel.com/t5/Software-Tuning-Performance/TSC-frequency-computation/m-p/1193432
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https://community.intel.com/t5/Software-Tuning-Performance/i5-8250U-1-6-GHz-has-a-base-frequency-of-1-8-GHz/m-p/1155718/highlight/true
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15H
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NOTES: If EBX[31:0] is 0, the TSC/"core crystal clock" ratio is not enumerated.
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EBX[31:0]/EAX[31:0] indicates the ratio of the TSC frequency and the core crystal clock frequency.
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If ECX is 0, the nominal core crystal clock frequency is not enumerated.
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"TSC frequency" = "core crystal clock frequency" * EBX/EAX.
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The core crystal clock may differ from the reference clock, bus clock, or core clock frequencies.
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EAX Bits 31-00: An unsigned integer which is the denominator of the TSC/"core crystal clock" ratio.
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EAX Bits 31-00: An unsigned integer which is the denominator of the TSC/"core crystal clock" ratio.
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EBX Bits 31-00: An unsigned integer which is the numerator of the TSC/"core crystal clock" ratio.
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EBX Bits 31-00: An unsigned integer which is the numerator of the TSC/"core crystal clock" ratio.
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@ -50,14 +59,67 @@ ECX Bits 31-00: An unsigned integer which is the nominal frequency of the core c
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EDX Bits 31-00: Reserved = 0.
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EDX Bits 31-00: Reserved = 0.
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*/
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*/
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void checkFrequencyTSC(uint64_t* freq){
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if (logicore == nullptr) return NULL;
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char** AMDMeCagoEnTusPutosMuertos () {
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uint64_t raxlo,rdxho, rcx;
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char** palabritas = (char**)malloc(sizeof(char) * 48);
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asm volatile ( ".intel_syntax noprefix\t\n"
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uint64_t siguienteLetra = 0;
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"rdtscp\t\n"
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//char letrita;
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"lfence\t\n": "=a" (raxlo), "=d" (rdxho), "=c" (rcx) );
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uint64_t regs[4];//rax rbx, rcx, rdx;
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asm volatile ( ".intel_syntax noprefix\t\n" \
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"mov eax, 0x80000002\t\n" \
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"cpuid\t\n" : "=a" (regs[0]), "=b" (regs[1]), "=c" (regs[2]), "=d" (regs[3]) );
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int byte = 0;
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for (int reg = 0; reg < 4; reg++, siguienteLetra++, byte = 0){
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char* letrita = nullptr;
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char* charifiedReg = (char*)®s[reg];
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for(; byte < 4; byte++){
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letrita = (char*)malloc(sizeof(char));
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*letrita = charifiedReg[byte];
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*palabritas[siguienteLetra] = *letrita;
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}
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//uint8_t num = 0;
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//byte = 0;
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//char* letrita = malloc(sizeof(char));
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//letrita* = 0;
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//letrita* |= (;
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}
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*palabritas[siguienteLetra + 1] = '\0';
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return palabritas;
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}
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int16_t checkFrequencyTSC(uint64_t* freq){
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if (freq == nullptr) return -1;
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uint64_t raxde;
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asm volatile ( ".intel_syntax noprefix\t\n" \
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"mov eax, 0x0\t\n" \
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"cpuid\t\n" : "=a" (raxde) );
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if (raxde < 15) {
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//check tsc existence??????
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uint64_t rdxmsr;
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asm volatile ( ".intel_syntax noprefix\t\n" \
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"mov eax, 0x01\t\n" \
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"cpuid\t\n" : "=a" (raxde), "=d" (rdxmsr) );
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if (!((1<<5) & rdxmsr)) return -3;
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asm volatile ( ".intel_syntax noprefix\t\n" \
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"mov eax, 0x01\t\n" \
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"cpuid\t\n" : "=a" (raxde), "=d" (rdxmsr) );
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}
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uint64_t rbxnum, rcxhz;
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asm volatile ( ".intel_syntax noprefix\t\n" \
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"mov eax, 0x15\t\n" \
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"cpuid\t\n" : "=a" (raxde), "=b" (rbxnum), "=c" (rcxhz) );
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//"rdtscp\n" : "=a" (raxlo), "=d" (rdxho));
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//"rdtscp\n" : "=a" (raxlo), "=d" (rdxho));
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freq
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if (rbxnum == 0 || rcxhz == 0) return -2;
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//also 18.17.4 Invariant Time-Keepin Volume 3 Intel
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uint64_t TSCFreq = (rcxhz * rbxnum)/raxde;
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*freq = TSCFreq;
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return 0;
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}
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}
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//static inline
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//static inline
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@ -84,9 +146,15 @@ uint64_t rdtscp(uint64_t* logicore ) {
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}
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}
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int main(int argc, char** argv){
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int main(int argc, char** argv){
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//AMD Momento
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char** opiniones = AMDMeCagoEnTusPutosMuertos();
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//Cordura
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int16_t result;
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uint64_t tf = 0;
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uint64_t* TSCFreq = &tf;
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bool iTSC = checkInvariantTSC();
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bool iTSC = checkInvariantTSC();
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log_debugcpp(iTSC);
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result = checkFrequencyTSC(TSCFreq);
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if (iTSC) {
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if (iTSC && !result) {
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uint64_t test = rdtsc();
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uint64_t test = rdtsc();
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log_debugcpp(test);
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log_debugcpp(test);
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uint64_t ayo = 0;
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uint64_t ayo = 0;
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